Progress in the silicon process technology has enabled provisioning of significantly large on-die caches causing a close proximity of the cache to the processing devices. Current processing devices such as graphics devices may ensure coherency by flushing the contents of the on-die caches to a main memory before the display engine uses the contents of the main memory to render a display on a display device. The display engine may retrieve the contents (display data units) from the main memory and may, isochronously, provide the display data units to the display device without snooping into the on-die caches. Flushing such large on-die caches to ensure coherency may consume resources such as processor cycles, bus bandwidth, memory bandwidth, and such other similar resources. Also, much of the non display data units stored in the on-die cache may also be flushed to the main memory and such non display data units may not be required by the display engine for rendering display on the display device.